Members of the Bitcoin Unlimited organization and the Nexa team, Dr. Peter Rizun (B.U. Secretary & Nexa Chief Scientist) and Dagur Valberg (Rostrum Developer at Nexa), are at the Bliss Conference from May 13 to 15, 2025, in the vibrant city of Ljubljana, Slovenia.
Dr. Peter Rizun presented on hardware acceleration and shared his latest research findings with the audience. We’ll have more news and content after the event; in the meantime, we invite you to view his Nexa-PoW ASIC work, originally presented at a recent conference in Sydney, Australia.
Nexa-PoW ASIC
Below is a 3D rendering of the Nexa-PoW ASIC. It measures just 10 mm × 10 mm in a ball-grid array package and looks like any other microchip. Inside, however, it houses a Bitcoin full-node core capable of processing one million transactions per second. It also supports NEXA’s extended instruction set for advanced Script operations introduced by Andrew Stone.
Key features include:
- 32 parallel transaction-validation engines
- 32 elliptic-curve point multipliers for fast signature verification
- Integrated mining cores
- A massively parallelized tree-root-hashing circuit
Altogether, the design uses about 360 million transistors. That sounds like a lot, but modern GPUs can pack over 100 billion transistors, so this is actually a modestly sized chip. Using TSMC’s 16 nm process, capable of placing roughly 40 million transistors per mm², the die measures about 3 mm × 3 mm. In other words, it could easily sit on the tip of your finger or even balance on the head of a pin.
The Nexa-PoW algorithm, implemented on this chip involves verifying a digital signature and updating the UTXO set, the two primary bottlenecks in full-node scaling. To mine, the chip uses the exact same hardware pipeline it uses for validation, so mining and transaction validation truly operate on a 1:1 basis.
Looking Forward to Post-Conference News
We highly recommend getting familiar with Dr. Peter Rizun’s presentation on hardware scaling if you haven’t already. We’ll be releasing more news after the conference, so stay tuned and be sure to follow our channels.
Cryptocurrency-Specific Integrated Circuits: A New Chapter in Scaling